Silicon Engineer

The shape of it

In the posting’s own words

You will be one of a small number of people covering a large surface. We are opening searches across the key domains below, and we are interested in candidates whose center of gravity sits in any of them:

What it asks for · 8

• Deep, hands-on expertise in at least one silicon domain: front-end design, pre-silicon verification, physical design, design for test, analog and mixed-signal, technology and foundry, design infrastructure, or packaging and signal/power integrity
• Direct personal contribution to silicon that taped out and shipped, with ownership you can speak to in detail
• Working fluency in the domains adjacent to your own, sufficient to reason about chip-level tradeoffs outside your specialty
• Experience working with external partners — ASIC houses, IP vendors, foundries, or test partners — including reviewing their work and holding a technical bar
• Track record of owning directional technical decisions and their consequences, not only making recommendations
• Practical experience using AI coding tools in your own work, and clear ideas about where they help and where they do not
• Clear written and verbal communication, and experience driving alignment across teams and organizations
• Comfort operating with high autonomy and little scaffolding on a highly dynamic program

Also a plus

• Experience on machine learning accelerators, high-performance compute, or other large, high-bandwidth designs
• Experience on a founding or early-stage silicon team, including standing up flows, methodology, or tooling from nothing
• Experience with both partner-executed and fully in-house programs, and a view on the tradeoffs between them
• Familiarity with the chip-package-system interface and the tradeoffs that cross it
• Experience with hardware-software co-design and working directly with compiler, kernel, or runtime teams
• Experience building or extending AI-assisted design, verification, or physical design flows
• Depth in memory subsystems, on-die interconnect, numerics, or low-power design

What the job covers

• Take part in end to end activities for the program: strategy, specification, execution and the technical bar.
• Write the specifications and interface definitions that others design against and keep them coherent as the architecture converges
• Make and own directional calls: technology and IP selection, where we build versus buy versus license, and where we take design authority versus rely on partners
• Build and share AI-assisted approaches to the code-like parts of your domain, and help the team learn what Claude can genuinely accelerate
• Contribute to the architecture and micro-architecture discussion from your domain's perspective, including the tradeoffs your area imposes on the rest of the chip
• Partner with Anthropic's inference, performance, kernels, and infrastructure teams on hardware-software co-design, and with our hardware systems team on bring-up and integration
• Support first-silicon bring-up and debug when it arrives, regardless of which domain you came in through

Tools and skills named

Words the posting leans on

• design14×
• experience8×
• domain7×
• partners7×
• silicon7×
• specification4×
• test4×
• tradeoffs4×
• versus4×
• architecture3×
• building3×
• flows3×
• integrity3×
• interface3×
• large3×
• physical design3×

Counted from the posting after the mission statement and the legal notices are set aside. The ones near the top are the ones a screener is looking for.

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